01Background
Lars Bergström spent 15 years at Ericsson designing embedded systems for telecommunications infrastructure — the kind of systems where a dropped packet can cascade into a nationwide outage. His expertise in real-time systems architecture, FPGA design, and hardware-software co-design makes him the perfect person to build the computational backbone of JPL's projects.
At JPL, Lars serves as the systems architect across all four active projects. He designs the FPGA co-processors for NOVA's edge inference pipeline, the DAQ system for IGNIS, the beamforming controller for PRISM, and the ROS2 communication layer for AEGIS. If data flows through it, Lars probably designed it.
02Expertise
03Projects
04Philosophy
"At Ericsson, I kept phone calls connected. At JPL, I keep rockets connected to their brains. The principles are the same — reliability, latency, and never, ever dropping a packet."
Want to work with Lars?
We need embedded engineers, FPGA developers, and real-time systems specialists.
Stockholm, Sweden